Publications 

Preet Jain (Journal -2, Confernce-12 )

Rishabh Badjatya, Preet Jain, “Customizing Controllers to Increase Processor Performance”, International Journal of Engineering Science and Technology, ISSN: 0975-5462 Vol4 No.2 February 2012.

Preet Jain, D.K Mishra, “BIST for System on Chip for Biomedical Signal Processing” IEEE North Atlantic Test Workshop, 9-11 May’12, Woburn, USA

Khatri R., Mishra D.K, Jain P “A Low Power Low Noise Amplifier for Ultra Wideband Applications” International Conference on Communication Systems and Network Technologies (CSNT), 2012, 11-13 May 2012, Rajkot.

Sachin Manglasheril, Preet Jain “USB- Serial Interface Engine Implementation on FPGA” National Conference on Recent Advancement in Science Technology and Management-2011, 12-13 Nov-2011, Indore.

Pratik Rathore, Preet Jain, “ Design and Implementation of a 2D Graphics engine based on AMBA AHB 2.0”, National Conference on Recent Advancement in Science Technology and Management-2011, 12-13 Nov-2011, Indore.

Akanksha Pagare, Preet Jain, “ Design implementation of AXI interconnect with DDR Memory controller for MPSoC”, National Conference on Recent Advancement in Science Technology and Management-2011, 12-13 Nov-2011, Indore. 

Assistive Devices for Physically Challenged Person, CICN 2011, Gwalior

WSN based Ubiquitous Agricultural Information and Irrigation System, National Conference, 10th-11th March 2011. New Delhi.  

“A two stage and three stage CMOS OPAMP with fast settling, high DC gain and low power designed in 180nm technology”

“Design and Development of a Framework for HIL Testing of Digital Hardware with MATLAB” in National Conference on Emerging Technologies in Electronics Mechanical and Computer Engineering at IIST, Indore on 17th -18th April 2010 

Expandable Multiple Line Binary Test Sequence Generator with Gray Code Counter and De-multiplexer as Design Elements, international conference VLSI and Communication Engineering, SAINTGITS College of Engineering, 16-18 April, 2009 .

“FPGA Implementation of Expandable Multiple Line Test Pattern Generator with Standard Combinational Logic Elements” at National Conference on Information Technology Trends in Engineering Application (NEC-2009) Dayananda Sagar College of Engineering, Bangalore, from 19-21 March 2009. 

FPGA Implementation of Module Based Multiple Line Pseudorandom Sequence Generator at National Conference on VLSI, Communication and Networks (VCaN 2008) Easwari Engineering College Chennai.

Mr. Nilesh Chaurasia (4) 

  • “Design and Development of a Framework for HIL Testing of Digital Hardware with MATLAB” in National Conference on Emerging Technologies in Electronics Mechanical and Computer Engineering at IIST, Indore on 17th -18th April 2010.
  • “Configurable Multiprocessor Platform without RTOS for Distributed Interfacing and Controlling”, National Conference on Wireless Communication and VLSI Design at Gwalior engineering College, Gwalior on 27th-28th March 2010 .
  • “Design and Development of a Framework for Intelligent Robots”, National Conference on Software Engineering & Information Security at Acropolis Institute of Technology and Research, Indore on 23rd - 24th October 2009.
  • DC Motor Control by Using PWM method for Autonomous Robot”, National Conference On Emerging Trends In Information Technology at SGSITS, Indore on 18th – 20th, December 2007.

Mrs. Anjali Gupta (2) 

  • Design of Quadrapole Magnet Power Supply Using SMPS Topology, International conference, Kurukshetra, 14th -16th Oct. 2010.
  • Analysis of Higher Order Statistical Techniques for Speech Signal Recognition, International Conference, SIRT Bhopal, 9th-10th Jan. 2011.

Mrs. Chanchal Soni (2) 

  • Design of Quadrapole Magnet Power Supply Using SMPS Topology, International conference, Kurukshetra, 14th -16th Oct. 2010.
  • Analysis of Higher Order Statistical Techniques for Speech Signal Recognition, International Conference, SIRT Bhopal, 9th-10th Jan. 2011.

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